FIGS. 14-16 show a surface mount electronic component disclosed in Patent Document 1 as a prior art.
The surface mount electronic component 1′ includes at least a set of lead terminals 2′ and 3′ made of a thin metal plate and arranged on the same plane to extend in opposite directions from each other. The first lead terminal 2′ has an end integrally formed with an island portion 4′ having a relatively large width, whereas the second lead terminal 3′ has an end integrally formed with a bonding portion 5′ having a relatively large width. A semiconductor chip 6′ is bonded on the island portion 4′. The semiconductor chip 6′ is electrically connected to the bonding portion 5′ of the second lead terminal 3′ by e.g. wire bonding using a wire 7′. The above-described parts are hermetically sealed in a package 8′ made of a synthetic resin so that the lead terminals 2′ and 3′ partially project from opposite side surfaces 8a and 8b of the package 8′, respectively. Each of the lead terminals 2′ and 3′ includes a bent portion 2a′ and 3a′ positioned within the package 8′ and formed by bending the lead terminal downward and then in the direction along the lower surface 8c′ of the package 8′. With this structure, part of the lower surfaces of the lead terminals 2′ and 3′ serves as mount surfaces 9′, 10′ exposed at the lower surface 8c′ of the package 8′.
Patent Document 1: JP-A-H03-248551